EECS 470

Computer Architecture · Fall 2026 · University of Michigan

Questions to Ponder

Being able to answer these questions is a sign that you are “getting it.” If one of them stops you, that is the signal to go back to the lecture or the reading — or to ask on Piazza. This list keeps on expanding…

Big questions9

  1. Cost vs Performance (Capability) vs Efficiency: why does the trade-off keep on changing?
  2. Why do key metrics that drive the industry keep on changing over time?
  3. Why should you understand the trends that are shaping an industry?
  4. How can Neumann & Morgenstern’s observation on self-contradictory requirements be reconciled in practice?
  5. Who is the quote “I am sorry for the long letter. I didn’t have time to write a short one” attributed to? Who was he?
  6. What is pareto optimality?
  7. Why didn’t the computer age start in the 19th century with Babbage?
  8. What are “killer apps”? Why do they keep changing over time?
  9. Why was this section of the class called “The Quest for Good Enough”?

Origins15

  1. What advantages did vacuum tubes have over electromechanical computers?
  2. What is the difference between a calculator and a computer? Why does this matter?
  3. Is the punched card sorter a calculator or a computer?
  4. What were the key innovations that enabled the creation of the telegraph?
  5. How were Gerard de Prony’s Human Computers organized? Where do you find similar organizations today?
  6. What was the key idea in the Turing Test? Is this test still relevant today?
  7. What is the key idea in a Relay?
  8. For approximately how many years were punched cards in use?
  9. Why was the idea of a stored program computer a game-changer? What did this enable?
  10. How big was the first operating system on the EDSAC? What was a unique feature of the bootstrap loader that enabled libraries and code reuse?
  11. How long did it take between the invention of the transistor and its first use in a computer?
  12. What was the unique gamble with the IBM S/360 that no one had done before?
  13. What is the difference between the symbol rate (baud rate) and the bit rate of a modem?
  14. What are the most important differences between the Intel 4004 and MOS 6502?
  15. What are the main trade-offs the Commodore 64 designers made to drastically reduce its price?

Codes and numbers7

  1. Compare the codes: Morse, ASCII, EBCDIC, PETSCII – what were the different design constraints? Would you design these codes differently in a modern way?
  2. What similarities and differences do you see between character and opcode encodings?
  3. Compare the design of the Sumerian number system with that of BCD numbers: what are the similarities? Differences?
  4. Why use BCD instead of binary number representation?
  5. Why does the HP-65 calculator encode instruction op codes as rows and columns? What were they trying to achieve with this approach?
  6. Why was Reverse Polish Notation used on early calculators? What problems did it solve?
  7. What is the main insight of the CORDIC algorithm? What makes it suitable for implementation on simple hardware?

Circuits and silicon12

  1. What were the advantages of CMOS over previous transistor designs?
  2. What’s the difference between combinational and sequential circuits?
  3. What’s the difference between a latch and a flip-flop?
  4. What is the key property that makes flip-flops the key building block for pipeline stages?
  5. What are the important timing parameters for a flip-flop?
  6. What are design margins? Why do they matter? Can they be eliminated?
  7. Why do we use synchronous design?
  8. What does “track” mean when referring to a standard cell library?
  9. What are process corners? (aka characterization corners) and why do they matter?
  10. What does parametric yield mean?
  11. What is RTL? What is Hard IP? What is Soft IP?
  12. What enables registers to be simultaneously read and written? What synchronizes that behavior across a processor?

Moore’s law, power and cost16

  1. Why are most new processors increasingly made up of chiplets?
  2. How many transistors does Intel expect to have on a chip by 2030?
  3. What does the original Moore’s law say?
  4. How do companies interpret Moore’s law today?
  5. What is power density (of a processor)? Why does it matter?
  6. What does the end of Moore’s law mean?
  7. What is the concept of “dark silicon,” and how did this become a problem early in the 21st century?
  8. What is Amdahl’s law? What type of a broader concept is it an instance of?
  9. What does PPA stand for? What is area a proxy for?
  10. What’s the difference between power and energy?
  11. Why is leakage power a problem for microarchitects?
  12. How can parallel computation be good for dynamic power consumption?
  13. How can dynamic voltage scaling reduce energy use?
  14. Why is the energy-delay squared product used as a metric?
  15. Why is voltage scaling the preferred optimization compared to many other microarchitectural power optimization techniques?
  16. What is the reticle? Why is the reticle limit an important size constraint?

Benchmarking5

  1. What are two definitions of performance? Is there a right one?
  2. What are the three means that are used to average performance? Which one is used when? How come geomean is used for anything?
  3. What is the iron law of performance?
  4. What problem did the SPEC benchmark suite set out to solve compared to Dhrystone?
  5. When would you use the total number of instructions as a benchmark metric? When would you use a rate like: instructions/cycle?

Instruction sets11

  1. What is the difference between an architecture and a microarchitecture?
  2. What is the difference between microcode and micro-op?
  3. What are predicates, and why might it be advantageous to use them?
  4. Who invented microcode and why?
  5. What is a good use case for the PowerPC’s rlwinm instruction?
  6. What is the most important difference between CISC and RISC? Is that difference still important today?
  7. Why were complex instructions preferred? What are big issues when implementing complex instructions in hardware?
  8. Why are microcode and micro-ops usually not exposed outside of the processor? (one cannot write software directly in ucode)
  9. What are the five ways of organizing instruction sets? Why was it the accumulator-based ISA that came first?
  10. What are all the things an ISA specifies as an interface between software and hardware?
  11. The Instruction Set Architecture reflects the technology constraints of the era in which it was designed. Would you do it differently if you were to design one from scratch today?

Pipelining12

  1. What are the four things that pipelining accomplishes? What are between pipeline stages?
  2. What do forwarding paths accomplish? Are forwarding paths as important in out-of-order processors as in in-order ones?
  3. Why is it important to balance pipelines? Why may it be impossible?
  4. What is super about superpipelines?
  5. What is super about superscalar? What is not so super about in-order superscalar?
  6. Which has the bigger “bang for the buck”: superscalar or superpipelining?
  7. What does a scoreboard do?
  8. What did the Pentium 4 architects claim as optimum pipeline depth? What did they do to their ALU to reduce the negative impact of very deep pipelines?
  9. In what ways is an automotive assembly line different from a pipeline in a processor?
  10. Can an in-order pipeline run multiple instructions concurrently? Can multiple functional units in an in-order pipeline be used concurrently?
  11. What problem does the Replay buffer solve on the ARM Cortex-A8?
  12. What part of the clock cycle doesn’t scale as the pipeline is made deeper? Why is performance measured against the branch miss pipeline depth?

Prediction and speculation10

  1. What are basic blocks? Why are they interesting?
  2. What are other predictors in microarchitecture (even if we don’t call them predictors)?
  3. Why do we need a branch target buffer?
  4. What are two ways of determining that an instruction is a branch early in the pipeline?
  5. What’s the difference between a static and a dynamic basic block?
  6. Why do we need to predict branches in a pipeline? What are the various pieces that may need to be predicted?
  7. What makes a choice made by hardware speculative? Can a non-speculative choice be speculative?
  8. What is a program’s working set? How can its evolution be predicted?
  9. Why is a 2-bit saturating counter better than a single bit? Would a 3-bit saturating counter make even more sense?
  10. What is correlated in the two-level predictor?

Dependencies and renaming8

  1. What are the three types of data dependencies? Which one is the only true dependency?
  2. What does register renaming accomplish beyond eliminating the false dependencies?
  3. What is a dependency graph?
  4. What are two techniques for recycling physical registers? What are the trade-offs between them?
  5. Why do we call RAW a true dependency and WAW and WAR false dependencies? What can we do to eliminate false dependencies?
  6. What would be worse (or more difficult) if an out-of-order processor didn’t include register renaming?
  7. There is a simple algorithm for recycling physical registers; what needs to be tracked before a physical register can be reused?
  8. Why can’t we just rename memory locations the same way we rename registers?

Out-of-order execution16

  1. Why are queues everywhere in modern microarchitectures?
  2. What does a load-store queue do? Why do we need to have it in modern processors?
  3. How would you design a fully deterministic processor? What components would you leave out or include? What would be the point of such a processor?
  4. What do dispatch and issue refer to? What are we dispatching or issuing instructions to?
  5. What do the terms wakeup and select refer to in microarchitecture?
  6. What does a very wide fetch window enable a microarchitecture to do? Does it help on in-order machines?
  7. What parts of an out-of-order processor are performed in order? Why?
  8. Why are precise interrupts (exceptions) important? What do they enable?
  9. In modern parlance, what is the difference between interrupts and exceptions?
  10. What is the function of the reorder buffer?
  11. Why does the R10K microarchitecture use tags instead of values? Where are the values stored? What are the value storage blocks close to?
  12. What are two ways to recover architected state on the R10K? What are the trade-offs between them?
  13. Is there a point to a separate architectural map table when a processor uses checkpoints?
  14. On an R10K, when is the register file written to? When can a physical register be freed? Why can it be freed then?
  15. Why does the system distinguish between different kinds of interrupts? Why are precise interrupts a special class that are extra important?
  16. What are all the things that a load-store queue can accomplish?

Decoupling and latency5

  1. What was the main idea behind the Decoupled Access Execute architecture proposed by Jim Smith?
  2. What does runahead execution mean? What does it run ahead of?
  3. What is the point of fusing instructions?
  4. Why is decoupling execution a good idea?
  5. Why do we try to decouple things in microprocessors?

Memory and caches25

  1. “It’s the memory, stupid!”: who said that and what was his point?
  2. What would be the advantages and disadvantages of having multiple different memory systems in a processor?
  3. What is a micro-op cache, and how is it different from a “regular” cache?
  4. What is prefetching? What are two key parameters related to it?
  5. Why do we need a replacement policy in caches?
  6. What is a set-associative cache? What is the relationship of a set-associative cache to a direct-mapped cache?
  7. Why do we have multiple levels of caches? Why not just one?
  8. What is the point of an inclusive cache?
  9. What is the difference between a multi-ported and a multi-banked cache? Which one is used more?
  10. Why was virtual memory an indispensable feature that enabled timesharing on the IBM 360-67? Why didn’t it have to walk page tables for address translation?
  11. What is the key insight in the clock hand algorithm? How does this relate to the operation of caches?
  12. Why is it “all about the memories” in a computer?
  13. How is a bus different from wires?
  14. How is a buffer different from a cache?
  15. Why should we care about write policies in caches? What about the inclusion property?
  16. What problem does the victim cache solve? Do we have that problem today?
  17. Why do computers use separate I and D caches?
  18. What is the point of a decoded instruction cache?
  19. Why does DRAM need a memory controller that is, usually, not on the same chip?
  20. How is a micro-op cache organized?
  21. In what ways is the RRIP algorithm for cache replacement similar to the clock hand algorithm?
  22. What problem does a VIPT cache solve?
  23. What is page coloring, and why may it be needed when using a VIPT cache?
  24. What are some replacement policies that might be used in caches? Which one is the simplest (but worst) one?
  25. What is the point of prefetching? Should a prefetcher always prefetch into the cache?

Parallelism and GPUs3

  1. Why does heterogeneous, cache-coherent multiprocessing make sense?
  2. Why can’t NVIDIA use real unified memory on most of their GPUs?
  3. What does SIMD processing aim to accomplish? What are the trade-offs that a SIMD design incurs?

Emulation and virtualization5

  1. What are the differences between simulation and emulation?
  2. What does threading solve in an emulator? Is it at all related to OS threads?
  3. What is a stub? What is it used for in an emulator?
  4. Why does virtualization require so many levels of trapping into the VMM, especially when virtualizing I/O devices?
  5. In a dynamic translator, why does control flow have to go through a table lookup?